LTC4210-2CS6#TRM【PDF 10/20 页】IC CONTROLLER HOT SWAP TSOT23-6

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Sheet目录41

6页 7页 8页 9页 [10页]11页 12页 13页 14页

LTC4210-1/LTC4210-2

421012f

parasitic oscillations frequently associated with the power

MOSFET. In some applications, the user may find that R

helps in short-circuit transient recovery as well. However,

too large of an R

value will slow down the turn-off time.

The recommended R

range is between 5& and 500&.

Usually, method 2 is preferred when the input supply volt-

age is greater than 10V. R

limits the current flow into the

GATE pins internal zener clamp during transient events.

The recommended R

and C

values are the same as

method 1. The parasitic compensation capacitor C

required when 0.2礔 < load capacitance C

< 9礔, other-

wise it is optional.

Parasitic MOSFET Oscillation

There are two possible parasitic oscillations when the

MOSFET operates as a source follower when ramping at

power-up or during current limiting. The first type of os-

cillation occurs at high frequencies, typically above 1MHz.

This high frequency oscillation is easily damped with R

mentioned in method 2.

The second type of oscillation occurs at frequencies be-

tween 200kHz and 800kHz due to the load capacitance

being between 0.2礔 and 9礔, the presence of R

and R

resistance, the absence of a drain bypass capacitor, a com-

bination of bus wiring inductance and bus supply output

impedance. There are several ways to prevent this second

type of oscillation. The simplest way is to avoid load ca-

pacitance below 10礔, the second choice is connecting an

external C

> 1.5nF.

APPLICATIO S I FOR ATIO

SENSE

0.007&

Si4410DY

*ADDITIONAL DETAILS

OMITTED FOR CLARITY

**USE C

IF 0.2礔 < C

< 9礔,

OTHERWISE NOT REQUIRED

100&

10nF

GATE

LTC4210*

(2a)

Method 1

SENSE

0.007&

200&

2.2nF

12V

OUT

100&

10nF

4210 F02

GATE

LTC4210*

(2b)

Method 2

Figure 2. Frequency Compensation

If a 7m& sense resistor with ?% tolerance is used for

current limiting, the nominal current limit is 7.14A. From

Equations 2 and 3, I

LIMIT(MIN)

= 6.22A and I

LIMIT(MAX)

8.08A. For proper operation, the minimum current limit

must exceed the circuit maximum operating load current

with margin. The sense resistor power rating must exceed

CB(MAX)

SENSE(MIN)

Frequency Compensation

A compensation circuit should be connected to the GATE

pin for current limit loop stability.

Method 1

The simplest frequency compensation network consists

of R

and C

(Figure 2a). The total GATE capacitance is:

GATE

= C

ISS

+ C

(4)

Generally, the compensation value in Figure 2a is suffi-

cient for a pair of input wires less than a foot in length.

Applications with longer input wires may require the R

value to be increased for better fault transient perfor-

mance. For a pair of three foot input wires, users can start

with C

= 47nF and R

= 100&. Despite the wire length, the

general rule for AC stability required is C

e 8nF and R

1k&.

Method 2

The compensation network in Figure 2b is similar to the

circuitry used in method 1 but with an additional gate re-

sistor R

. The R

resistor helps to minimize high frequency

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